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Difference between revisions of "CANNY 7, HR PWM Driver"

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(Drivers Registers)
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!Expected Values
 
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|style="padding-left:0.5em;"|HR PWM period register, μs
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|style="padding-left:0.5em;"|HR PWM activation рegister #1
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|style="padding-left:0.5em;"|HR PWM 1 Enable Register
 
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|style="padding-left:0.5em;"|HR PWM activation рegister #2
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|style="padding-left:0.5em;"|HR PWM 2 Enable Register
 
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|style="padding-left:0.5em;"|HR PWM duty cycle register #1, μs
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|style="padding-left:0.5em;"|HR PWM 1 Duty Register, μs
 
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|style="padding-left:0.5em;"|HR PWM duty cycle register #2, μs
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|style="padding-left:0.5em;"|HR PWM 2 Duty Register, μs
 
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|style="padding-left:0.5em;"|HR PWM pull-up register #1
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|style="padding-left:0.5em;"|HR PWM 1 Pull-up Enable Register
 
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|style="padding-left:0.5em;"|HR PWM pull-up register #2
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|style="padding-left:0.5em;"|HR PWM 2 Pull-up Enable Register
 
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Revision as of 15:18, 11 September 2016

General description

Two of the twelve IO channels (Channels #1 and #2) CANNY 7 supports high-resolution pulse-width modulator mode. The channels may be activated independently of each other and have independent duty cycle and pull-up line configuration, however, the high resolution PWM period is a parameter common to both channels. In HR PWM mode, PWM timing - the period and duty cycle are set in the range from 2 to 20,000 microseconds, in increments of 1 microsecond.

In HR PWM, the channel has a fixed pulse polarity - GND 100mA. Generation can be conducted in either open collector - no pull-up lines or external, so as in internal pull-up mode to +12V (specified by setting the value in the appropriate register). In this mode, the channel is asynchronous to functional diagram, which allows for maximum timing stability of generated signal.


The driver of high resolution pulse width modulator (HR PWM) operates using Discrete Inputs and Outputs resources, wherein, having a higher priority. Thus, upon activation of the RR PWM driver, controller channels used by it are unavailable to input-output drivers.

Note: In high resolution pulse width modulator mode, the electrical protection from short circuit is disabled! Overload or channel short-circuit which are in high resolution PWM mode, can lead to controller failure!

Drivers Registers

The following shows permissible values for control registers of high resolution PWM driver.

Address Expected Values
HR PWM 1 & 2 Period Register, μs
1...20000 = specify the period in microseconds RR PWM generator for both channels. The value in excess of 20,000 will be accepted as 20,000.
HR PWM 1 Enable Register
HR PWM 2 Enable Register
1...65535 = transfer controller channel in to high resolution pulse width modulator mode;
0 = return controller channel to normal mode.
HR PWM 1 Duty Register, μs
HR PWM 2 Duty Register, μs
1...20000 = set HR PWM channel filling (duty cycle) in microseconds. The value in excess of 20,000 will be accepted as 20,000.
HR PWM 1 Pull-up Enable Register
HR PWM 2 Pull-up Enable Register
1...65535 = HR PWM generation polarity for the channel «MINUS 100mA» / «positive pull-up»;
0 = HR PWM generation polarity for the channel «MINUS 100mA» / «air» (open collector mode).

An example of a functional diagram, continuously adjustable HR PWM duty cycle with carrier frequency 10 kHz on channel #1, by pressing / holding the buttons connected to the channels #9 and #10:

6 7 2 1.png

See also

CANNY 7

CANNY 7, Discrete IO Driver